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CPU BattleTanks: Control a tank with a Little Man Computer CPU

Free interactive resource to help students understand (and hopefully enjoy!) learning low level assembly code for a Little Man Computer

Pete Dring

Created by Pete Dring
last edited Mar 12 2015 by Pete Dring

LMC Editor

Battle Tanks Introduction video on youtube

When students start to code with a high level programming language such as python they have very little understanding of how the CPU actually runs the code that they write.

If students can understand how to write low level assembly code for a Little Man Computer CPU they are forced to grapple with how instructions and data are stored in memory, and how the logic inside the processor controls each of the registers to make everything else work.

The problem is that writing low level assembly code is hard. It’s also not that much fun for students if they’re only dealing with numbers on an abstract simulation.

Peter Higginson’s LMC simulator ( is a wonderful teaching resource that animates what happens on a LMC CPU but it can still baffle students until they are able to spend time working through it for themselves.

CPU battle tanks embeds a Little Man Computer CPU inside a tank that is simulated in a browser (it’s mobile / tablet friendly too) so that there’s more motivation to learn how the code works because you have to use the CPU to read from different input devices and write to different output devices in order to collect checkpoints, destroy mines and work your way through the missions.

This video tries to talk you through how to get started:

You can play Battle Tanks here:

The project is open source, so when you find bugs or think of ways it can be improved, why not get involved - or get your students to?! You can download the source code and suggest improvements here:

Level: KS4 Intermediate

Duration: 3-4 lessons

Teaches: (set of concepts learned)

  • What is a CPU: what it does and how it works.

  • Difference between high and low level programming languages.

  • Memory hierarchy: speed / capacity trade off between registers, RAM and HDDs.

  • Processor architecture: Difference between Harvard and Von Neumann architecture.

  • Fetch / Decode / Execute cycle: How the CPU follows instructions and processes data.

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